1. Field
Example embodiments of the present invention relate to a method of fabricating a single-crystalline wire, for example, a method of fabricating a higher quality single-crystalline wire in which the uniformity and size of the diameter are easily controlled, and a method of fabricating a transistor having the same.
2. Description of the Related Art
The continuous downscaling of conventional CMOS semiconductor devices has been limited by the rapid increase of the integration level thereof. In order to provide highly-integrated devices having higher-performance and lower power consumption in downscaling conventional CMOS semiconductor devices, the widths and lengths of gate electrodes may be reduced, the isolation regions between unit elements may be reduced, and the thicknesses and junction depths of gate insulation layers may be thinned. Because these changes should essentially ensure gate controllability, the ratio of an on-current to an off-current (Ion/Ioff) in transistors may be increased. In the conventional art, in order to enhance a driving current, ultra-thin body fully depleted (UTB-FD) silicon-on-insulator (SOI) transistors using SOI substrates and band-engineered transistors which use strained silicon channels to enhance electron mobility and/or the like, have been explored. In addition, various 3-dimensional silicon transistors, for example, vertical transistors, Fin-FETs, and double-gate transistors, have been researched. However, the gate structure of silicon transistors, having 3-dimensional gate structures, may not increase the field effects of the gate. Because a channel should be formed as a silicon substrate or a silicon layer with a 3-dimensional structure determined by deposition and patterning processes, the processes for forming a 3-dimensional gate structure may become complicated.
Recently, as an approach to overcome the downscaling limitation of a silicon device, transistors, using carbon nanotubes (CNTs) as channels, have been developed, for example, a CNT transistor operated at room temperature, a technique of horizontally growing CNTs and/or techniques of vertically growing CNTs from nanoholes.